Transfer a sample with DMA
Publish a coherent DMA descriptor, transfer ownership to hardware, and consume a completed buffer.
Jump to code and terminal ↓A bus address is not a C pointer
The harness allocates a descriptor and sample buffer with dmam_alloc_coherent. It passes CPU pointers and DMA bus addresses separately. Put buffer_dma in desc->address and use descriptor_dma for the device's low/high address registers. A kernel virtual pointer is not a device address.
Publish ownership
Set length, clear completed, and set LAB_DEVICE_OWNS in flags. Call the write barrier before publishing the descriptor address and ringing LAB_DMA_START. Hardware validates ownership and writes the current sample directly into guest RAM; it then sets completed to four, clears DEVICE_OWNS, and sets DMA_DONE.
Read only completed work
The completion callback first checks that DEVICE_OWNS is clear, then executes the read barrier before inspecting DMA_DONE and completed. If the device is disabled, it rejects the request and retains device ownership; that is not a completed sample. Coherent memory removes explicit cache maintenance here, but it does not remove ordering and ownership rules.
Your goal
Give the device a valid descriptor and report completion only after hardware returns ownership and completes four bytes.
What the tests observe
- The device DMA-writes the sample into guest RAM
- The descriptor reports four completed bytes and CPU ownership
- A disabled device produces an incomplete request rather than false success
Need a nudge?
Hint 1
Initialize address, length, completed, and flags before the write barrier. Then write both halves of descriptor_dma and ring the doorbell.
Hint 2
The device expects four bytes for one signed temperature sample. Successful flags are DMA_DONE with DEVICE_OWNS clear.
Hint 3
Return false immediately while desc->flags & LAB_DEVICE_OWNS. After the read barrier, verify DMA_DONE and completed == 4.
What happens inside Linux
Linux supplies coherent guest memory and bus addresses. The emulated peripheral reads its descriptor through the physical memory map and writes the sample into that RAM without a CPU store from the driver. It updates completion and raises an IRQ. The CPU regains ownership only after observing the device's completion protocol.
Optional account sync. Exercises work without an account.